Job Description
Roles and Responsibilities
Responsibilities
- Participate in architecture definition and modeling.
- Contribute in micro-architecture specification and reviews.
- Partake in verification environment architecture and methodology.
- Carry out testplanning and execution of testplan.
- Collaborate with design team members to effectively test, verify, and debug DUT for successful tapeout.
- Engage in post-silicon bringup and debug in the lab.
- Mentor and enable other engineers.
- Lead and oversee design verification efforts of a cluster of blocks.
Desired Candidate Profile
Qualifications And Skills • Bachelors or Masters (preferred) in Electrical/Computer engineering.
- Experience (atleast 5+ years) in high-performance ASIC verification.
- Good understanding of ASIC design and verification methodologies and flows.
- Hands-on experience with HVL and HDL languages and tools, scripting and programming languages (verilog, SV, C++, Perl and/or Python etc).
- Proficient in object oriented programming.
- Good understanding of constraint random stimulus generation methodology.
- UVM experience is required
- Good problem solving skills.
- Good communication and team skills.
- Networking knowledge preferred, but not essential